CV

Education

Ph.D in Hardware implementation of Spiking Neural Network, University of Sheffield, 2027 (expected)
M.S. in Electronics & Electrical Engineering, University of Glasgow, 2023
B.S. in Integrated circuit design and integrated system, Hefei University of Technology, 2022

Work experience

Spring 2021: Research Intern
- Wenzhou Branch of China Telecom Co.Ltd.
- Duties includes:
  - Theoretical study and practice of proprietary cloud operation and maintenance;
  - Learning and practice of SQL injection;
  - Learning and practice of network password security and analysis;
  - Vulnerability scanning and testing for telecommunication-related networks;
  - Participated in a series of conferences and seminars to study network security.
Summer 2020: Hardware Design Intern
- Rosenberger Asia Pacific Electronic Co., Ltd.
- Duties included:
  - Participated in the hardware design of 5G vehicle wireless terminal products, completed multiple chip peripheral circuit device selection and calculation;
  - Selected the circuit devices essential for products, calculated the power consumption, current, voltage and other data of the circuit required by the chip periphery, and calculated the devices’ resistance and inductance and other parameters for device selection.

Skills

ASIC/FPGA Design & Implementation
SoC architecture and AI accelerator design
AI model development and application
Coding
- Verilog
- Python
- Matlab
- C & C++

Publications

An Approximate Computing-Based Spiking Neural Networks Neuron Model and STDP Learning

H. Xia et al., “An Approximate Computing-Based Spiking Neural Networks Neuron Model and STDP Learning,” IEEE Trans. Circuits Syst. I-Regul. Pap., pp. 1-14, Oct. 2025.

A High Accuracy and Hardware Efficient Approximate Computing based Leaky integrate-and-fire Neuron Model

H. Xia et al., “A High Accuracy and Hardware Efficient Approximate Computing based Leaky integrate-and-fire Neuron Model,” in 2025 IEEE 38th International System-on-Chip Conference (SOCC), Oct. 2025, pp. 1-6.

Convolutional & Spiking Neural Networks for the Efficient Classification of Rotor Faults in Induction Motors via Stator Current and Stray Flux Signals

H. Xia et al., ”Convolutional & Spiking Neural Networks for the Efficient Classification of Rotor Faults in Induction Motors via Stator Current and Stray Flux Signals,” in 2025 IEEE Symposium on Diagnostics for Electric Machines, Power Electronics and Drives (SDEMPED), Aug. 2025, pp. 1-7.

A 3-D Multi-Precision Scalable Systolic FMA Architecture

H. Liu et al., “A 3-D Multi-Precision Scalable Systolic FMA Architecture,” IEEE Trans. Circuits Syst. I-Regul. Pap., pp. 265-276, Nov. 2024.

Haihang Xia

CV

Education

Work experience

Skills

Publications

An Approximate Computing-Based Spiking Neural Networks Neuron Model and STDP Learning

A High Accuracy and Hardware Efficient Approximate Computing based Leaky integrate-and-fire Neuron Model

Convolutional & Spiking Neural Networks for the Efficient Classification of Rotor Faults in Induction Motors via Stator Current and Stray Flux Signals

A 3-D Multi-Precision Scalable Systolic FMA Architecture

Conferences

NEXT-AI 2026: NEUROMORPHIX TECHNOLOGIES FOR FUTURE AI

The 36th British Machine Vision Conference

2025 38th IEEE International System-on-Chip Conference

15th Edition of the IEEE International Symposium on Diagnostics for Electrical Machines, Power Electronics and Drives

UK Design Forum 2025

Teaching

System Design

Advanced Computer Systems

Engineering Research and Design Project

E&C Lab in the Dimond

HDL Based Design and Programmable Logic

Microcontroller System Design